default/make/update-rules.sh

#!/bin/sh

# the directory where the executed Makefile is
dir="$1"

# extra flags to add to the compile recipe (if you want to use extra
# flags for the dependency resolution, set CFLAGS environment variable)
extra_flags="$2"

# additional source prefix in case the recipes are for a included Makefile
src_prefix="$3"

# the target directory for the object files (default: ../build/$dir/)
target="$4"

# the object file extension to use (default: $(OBJ_EXT) from the config.mk)
obj_ext="$5"


if [ -z "$dir" ]; then
  echo "Usage: $0 <src_dir>"
  exit 1
fi

if [ -z "$target" ]; then
  target="../build/$dir/"
fi

if [ -z "$obj_ext" ]; then
  obj_ext='$(OBJ_EXT)'
fi

if [ -d "$dir" ]; then
  :
else
  echo "'$dir' is not a directory"
  exit 1
fi

if [ -z "$CC" ]; then
  for cc in gcc clang ; do
    if command -v "$cc" > /dev/null ; then
      CC="$cc"
      break
    fi
  done
fi

if [ -z "$CC" ]; then
  echo "No suitable compiler found to generate make rules"
  exit 1
fi

if command -v sed > /dev/null ; then
  :
else
  echo "You need the 'sed' program for this script to work."
  exit 1
fi

# cleanup include paths to only depend on non-system headers
cflags=`echo $CFLAGS | sed 's/-I\//-isystem \//g'`

# switch into the directory of the executed Makefile and generate the recipes
cd "$dir"

mv ${src_prefix}Makefile ${src_prefix}Makefile.old
sed '/FORCE:/q' ${src_prefix}Makefile.old > ${src_prefix}Makefile
echo >> ${src_prefix}Makefile
for file in `ls ${src_prefix}*.c` ; do
  "$CC" -MT "$target$(basename $file .c)$obj_ext" -MM $cflags "$file"
  printf '\t$(CC) -o $@ $(CFLAGS) %s -c $<\n\n' "$extra_flags"
done  >> ${src_prefix}Makefile
rm ${src_prefix}Makefile.old